2022-05-09
一、MPSoC Introduction and Development Process
01_MPSoC Architecture Introduction
02_MPSoC Development Vivado Project Creation Process
03_MPSoC Development: Vitis Engineering Creation Process
04_MPSoC Solidification program for development
05_Using Batch Processing to Establish Vitis Project
二、MPSoC Peripheral infrastructure development
06_RTC Introduction to interrupt controllers
07_RTC Program analysis of interruption experiment
08_MIO GPIO Structure Introduction
09_MIO GPIO button and LED control experiment
10_EMIO GPIO button and LED control experiment
11_Introduction to PS UART Structure
12_PS UART read and write routine
13_PS UART interrupt routine
14_PS end CAN data loopback experiment
15_Introduction to i2c timing and EEPROM
16_i2c EEPROM And temperature sensor control experiment
17_PS end DP interface display experiment
18_SD Introduction to Principles
19_SD Card TXT File Reading and Writing Experiment
20_SD Card Bmp Image Display Experiment
21_A brief introduction to the concept of Ethernet TCP
22_PS Ethernet TCP ECHO SERVER Experiment
23_PL Ethernet TCP ECHO SERVER Experiment
24_QSPI FLASH Reading and Writing Experiments
25_QSPI FLASH Remote network updates
26_AXI GPIO Principle and Control Button LED Vivado Construction
27_AXI GPIO Vitis Engineering for Button and LED Control
28_RS485 Vivado Engineering Construction for Reading and Writing Experiments
29_RS485 Creation of Reading and Writing Experiment Vitis Project and Program analysis
三、Custom IP development
30_Introduction to the Principles of Customized IP
31_Custom IP Vivado Creation Process
32_Vitis project creation and Program analysis of customized IP
四、Dual Core Bare Metal Development
33_Dual Core Bare Metal Interrupt Usage and Dual Core Data Interaction Experiment
五、AXI bus development
34_AXI Introduction to Bus Protocol
35_The Vivado creation process for PL reading and writing PS side DDR
36_Creation and Joint Debugging of Vitis Project for PL Reading and Writing PS DDR
37_BRAM Read Write Vivado Creation Process for PS and PL Interaction
38_BRAM Reading and Writing Vitis Project Creation and Joint Debugging for PS and PL Interaction
六、AXI DMA develop
39_AXI DMA Introduction to Principles
40_AXI DMA The Vivado Project of Data Link
41_AXI DMA Vitis Engineering for Data Link
42_AXI DMA - AD9708 Signal Generator Vivado Engineering
43_AXI DMA - AD9708 Signal Generator Vitis Engineering
44_AXI DMA - AD9280 Collection and display of Vivado project
45_AXI DMA - AD9280 Acquisition and display of Vitis engineering
46_AXI DMA - AD9238 Collection and display experiment
47_AXI DMA - AD7606 Collection and display experiment
48_AXI DMA -SG Principle and Vivado Engineering
49_AXI DMA - SG mode Vitis software debugging
50_AXI DMA - AN9767 Signal Generator Vivado Project
51_AXI DMA - AN9767 Signal Generator Vitis Project
七、VDMA Development
52_VDMA Introduction to Principles
53_AN5642 Creation of Vivado project for binocular camera display
54_AN5642 Vitas project creation and Program analysis of binocular camera display
55_AN5642 Single camera capture and SD card storage experiment
56_AN5642 Ethernet transmission and image display experiment on upper computer
57_AN5641 MIPI Camera Display Experiment
八、Audio Development
58_AXI DMA之AN831 Audio Collection Vivado Project Creation
59_AXI DMA之AN831 Creation of Audio Acquisition Vitis Project and Program analysis
九、Touch screen development
60_Seven inch touch screen display and touch: Vivado project creation
61_Vitis project creation and Program analysis of seven inch touch screen display and touch
十、Ethernet development
62_ADC Ethernet transmission protocol
63_AD9280 Ethernet transmission and waveform display experiment on upper computer
64_AD9238 Ethernet transmission and waveform display experiment on upper computer
65_AD7606 Ethernet transmission and waveform display experiment on upper computer
The entire set of video courses will be serialized in the Moore Bar in collaboration with and outside the internet. Below, we will briefly introduce the entire set of courses
1. Content
This set of video tutorials is an original video tutorial created by ALINX company based on Xilinx MPSoC series FPGA. The content includes five major parts: bare metal development, Linux basic development, Linux driver development, Vitis HLS development, and Vitis AI development. It provides a detailed introduction to the development of various parts of the MPSoC series FPGA chip. The video is based on ALINX company's self-designed FPGA development board and combines theory with practice, This allows everyone to fully understand the development ideas and demonstrate mainstream technologies, such as the application of artificial intelligence AI, vehicle recognition, pedestrian detection, PCB defect detection, construction site safety helmet detection, flame detection, office object recognition, thermal imaging ADAS vehicle detection, concrete defect detection, etc., fully leveraging the flexibility, high performance, low latency, and high reliability of MPSoc series FPGA chips.
2. What background is required to study this course? Ability knowledge that needs to be previewed in advance
This set of videos does not start from scratch. It requires everyone to have a basic knowledge of FPGA development and Linux systems, understand the development architecture of ARM, as well as basic knowledge of data and electronics, circuits, etc. If you want to learn the AI part, you also need to have a basic knowledge of AI.
3. tools
Vitis 2020.1、Petalinux 2020.1、Vitis HLS 2020.1、Vitis AI 2020.1、VMware 12.1.1 Ubuntu 18.04.2
4. Course object-oriented
FPGA Development Engineer
Linux Software Development Engineer
HLS Development Engineer
AI Development Engineer
5. Application Fields Involved
Artificial intelligence, in vehicle autonomous driving, communication, medical, industrial control, etc
Links：
Alinx Electronic Technology (Shanghai) Co., Ltd. 滬ICP備13046728號